The goal of ever increasing precision and accuracy in the fabrication of semiconductor devices is increasingly important. Improvements in technology continuously shrink the size of semiconductor devices and increase the size of the silicon wafers on which the devices are formed. As a result, semiconductor device fabricators are able to produce more devices per production line and at a greater rate. In this context, ensuring that the percentage of usable semiconductor devices, or yield, remains high is vital as the higher the yield from a given wafer or series of wafers, the more semiconductor devices the manufacturer will have to sell.
One manner of improving yield in the semiconductor manufacturing process involves an inspection process in which a silicon wafer is inspect before and during the fabrication of the semiconductor device, after the semiconductor devices have been formed, and after the semiconductor devices have been separated from one another. Semiconductor devices are also inspected after they are packaged for use in various electronic and electro-mechanical devices.
Inspection of semiconductor devices identifies defects in the semiconductor devices due to errors in the formation of the devices, contamination by particles, and defects in the silicon wafer itself. Once defects have been identified, various yield improvement actions may be taken. In some cases, the defects will be indicative of one or more problems in the fabrication process and corrective measures can be taken. For example, improperly adjusted wafer handling mechanisms may cause scratches in the wafer under certain circumstances. Inspection of the wafer can help identify the mechanism making the scratches so that it can be properly adjusted.
The primary focus of most semiconductor device inspection is on the top surface of a silicon wafer where the dies are located. While the focus of inspection is generally on the top surface of the silicon wafer, it is becoming increasingly important to inspect the edge surface and bottom surface of the wafer. Defects on the top surface of the wafer directly impact the die themselves whereas defects on the edge and bottom surfaces generally impact the die indirectly. For example, blisters or chips on the edge of a silicon wafer can be a source of contamination that can damage or destroy die (the individual devices on the on the top surface of the silicon wafer). Similarly, particles on the back surface of the silicon wafer can cause defects that appear on the front surface of the wafer, e.g. ‘hot spots’.
While it is known to inspect the top, edge and back sides of a silicon wafer, this data is typically generated by separate inspection tools, which means that data concerning the distinct top, edge and back sides of the silicon wafer is recorded and analyzed separately. As a consequence, it can be difficult to correlate defects between the respective surfaces of a wafer. Furthermore, it is difficult to simultaneously visualize defect data on the separate top, edge and bottom sides of the silicon wafer when the data cannot be simultaneously viewed.